Advanced gate drivers for silicon carbide bipolar junction transistors

ABSTRACT

A gate driver circuit comprises a sensor, an amplifier, a regulator, and a gate driver. The sensor is configured to sense a collector-emitter voltage and includes a first resistor and a second resistor connected in series, a high voltage diode connected between the series connected first and second resistors and a first capacitor connected parallel to the second resistor. The amplifier is configured to amplify a sensor output voltage and includes a non-inverting operational amplifier controlled by means of a plurality of resistors, a voltage follower connected to an output terminal of the non-inverting operational amplifier through a first diode and a third resistor connected across the first diode and the voltage follower. The regulator is configured to regulate a regulator output voltage based on an amplifier voltage. The gate driver is configured to connect/disconnect the regulator output voltage to the base terminal of the BJT.

RELATED APPLICATIONS

This application claims priority from U.S. nonprovisional applicationSer. No. 16/927,899, filed Jul. 13, 2020 and granted Nov. 30, 2021, andwhich was a continuation of U.S. nonprovisional application Ser. No.15/990,881, filed May 29, 2018 and granted Jul. 14, 2020 as U.S. Pat.No. 10,715,135, and which claims priority from provisional applicationwith Ser. No. 62/520,645 filed on Jun. 16, 2017. The disclosures ofthese applications are incorporated herein as if set out in full.

BACKGROUND OF THE DISCLOSURE Technical Field of the Disclosure

This invention relates generally to bipolar junction transistors, andmore particularly to an advanced gate driver circuit for silicon carbide(SiC) bipolar junction transistors (BJTs) with minimum powerconsumption.

Description of the Related Art

Power switching devices have shown drastic developments due toadvancements in material science and manufacturing techniques. Among theavailable power switching devices, Silicon Carbide Bipolar JunctionTransistors (SiC BJTs) have the lowest specific on-resistance andoperate over a wide range of temperatures with average switching losses.The current gain of SiC BJT is close to 100, which reduces the basecurrent requirement and hence the driver losses. Moreover, the absenceof gate-oxide in SiC BJTs makes the technology suitable for highoperating temperatures. However, BJTs require continuous base current tomaintain their on-state. This necessitates the need for high powerrating drivers which in turn results in higher losses. Moreover, thebase current required at high loads can easily compromise the overallefficiency of the switch and the driver at light loads if it is notadjusted properly. Therefore, the base driver is a key component in SiCBJT based converters.

External drive circuits are required to supply the relatively large basecurrents that are required by high power BJTs. These drive circuits areused to selectively provide a current to the base of the BJT thatswitches the transistor between ON and OFF states. The base current isdetermined by the collector current and the DC current gain. However,the collector current varies within each switching period depending onthe converter topology and the load. In addition, the current gain isalso current and temperature sensitive. Thus, the maximization of theefficiency of the combination of switch and driver becomes a challengingtask.

One of the currently available gate drivers provides a Darlingtonconfiguration with the SiC BJT which increases the DC current gainbeyond 3400. This method reduces the base current requirement to a levelwhere it can be maintained constant regardless of the convertertopology, its load and the temperature, all without compromising theefficiency of the switch and the driver. However, it is only recommendedfor higher voltage applications due to the large total collector-emittervoltage drop. Another gate drive circuit includes an output transistoror a conventional gate driver IC that supplies a constant base currentto the switching element regardless of the collector current andtemperature. However, this gate drive circuit becomes very inefficientin converters operating in discontinuous conduction mode, inverters, orin any converter where the current flowing through the SiC BJT's is notconstant.

Several gate drivers that provide proportional base current aredeveloped to overcome this issue. One such gate driver describes severalparallel resistors connected to a voltage supply that generatesdiscretized base current. The base current is then adjusted by enablingthe number of resistance branches connected to the base to give theproportional base current. Another approach describes a synchronous buckconverter used as gate driver. The regulated output voltage is connectedto the base of the BJT to control the amount of base current. Stillother methods use a constant voltage source where the base resistance isvaried to change the base current. However, all the above methods arebased on current measurements which can be a challenge when higherbandwidths are required. Moreover, these methods have a high complexity,due to the current measurement needing to be processed in a digitalsignal processor (DSP) or a field-programmable gate array (FPGA) todetermine the number of branches to be enabled or to calculate the dutycycle of the switches that control the base voltage. Also, some of thesedrivers use the averaged inductor current for the calculation of thebase current, which allows the adjustment of the base current withrespect to the variations of the load and not with respect toinstantaneous variations of the collector current.

In addition, prior gate drivers do not consider the effect oftemperature on the BJT's DC current gain, which decreases with highertemperatures. This forces the driver to always operate the BJT assumingthe worst DC current gain, as if the BJT was always operating at themaximum expected temperature. Such approach translates into unnecessarydriver power consumption when the actual operating temperature is belowthe maximum, or in other words, when the DC current gain is not at itsminimum.

Therefore, there is a need for an advanced gate driver for siliconcarbide (SiC) bipolar junction transistors (BJTs) to provide aproportional base current with minimal power consumption and a methodfor optimizing the base current of the SiC BJT utilizing the gate drivercircuit. Such a gate driver would adjust the base current to theinstantaneous collector current by estimating the collector-emittervoltage. Further, such a needed gate driver would monitor the effect oftemperature on the DC current gain. Such a gate driver would provide acontinuous supply of base current to maintain the BJT in the ON state.Such a gate driver would have minimum power loss during the ON state andminimum switching losses, which increases the efficiency of the driver.Further, such a driver would eliminate the need for the high bandwidthcurrent sensors and the digital signal processors to process collectorcurrent of the BJT. The present embodiment overcomes shortcomings in thefield by accomplishing these critical objectives.

SUMMARY OF THE DISCLOSURE

To minimize the limitations found in the existing systems and methods,and to minimize other limitations that will be apparent upon the readingof this specification, the preferred embodiment of the present inventionprovides an advanced gate driver circuit for silicon carbide (SiC)bipolar junction transistors (BJTs) and a method for optimizing the basecurrent of the SiC BJT utilizing the gate driver circuit.

The gate driver circuit comprises a sensor connected between a collectorterminal and an emitter terminal of the BJT, an amplifier, a regulatorand a gate driver connected to a base terminal of the BJT. The sensor isconfigured to sense and measure a collector-emitter voltage VCE acrossthe collector terminal and the emitter terminal during the ON state ofthe BJT. The sensor comprises a first resistor and a second resistorconnected in series, a high voltage diode with an anode connectedbetween the series connected first and second resistors and the cathodeconnected to the collector terminal of the BJT and a first capacitorconnected parallel to the second resistor. The sensor can, preferably,be a high voltage decoupling diode.. The sensor provides a sensor outputvoltage V_(m) based on the measured collector-emitter voltage V_(CE).The amplifier is connected to a sensor output terminal across the firstcapacitor and is configured to amplify the sensor output voltage V_(m).The amplifier comprises a non-inverting operational amplifier controlledby means of a plurality of resistors, a voltage follower connected to anoutput of the non-inverting operational amplifier through a first diodeand a third resistor connected across the voltage follower configured toprovide the output of the amplifier. The amplifier is selected toprovide rail-to-rail operation, high bandwidth, good noise immunity andwith the ability to modify gain depending on the requirement of the basecurrent I_(b) based on collector-emitter voltage V_(CE). The amplifieris configured to amplify the sensor output voltage V_(m) to provide anamplifier output voltage V_(ref). The regulator is connected to anamplifier output terminal and is configured to regulate a regulatoroutput voltage V_(cc) based on the amplifier output voltage V_(ref). Theamplifier output voltage V_(ref) is used as a voltage reference for theregulator, which behaves like a buffer. The gate driver is connected toa regulator output terminal and is configured to connect/disconnect theregulator output voltage V_(cc) to the base terminal of the BJT. Withthe regulator output voltage V_(cc), the gate signals are generatedinternally in accordance with the amplifier output voltage V_(ref). Theregulator regulates the voltage of the gate driver to generate theinstantaneous proportional base current I_(b) based on thecollector-emitter voltage V_(CE) during the conducting state of the BJTand thereby minimizing the driver losses.

The method for optimizing the base current of the SiC BJT utilizing thegate driver circuit comprises th e steps of: providing the gate drivercircuit having a sensor, an amplifier, a regulator and a gate driver.Then sensing and measuring a collector-emitter voltage by the sensorbased on a collector current during the conducting state of the BJT.Then providing the measured sensor voltage to the amplifier of the gatedriver circuit and generating an amplifier output voltage and providingthe amplifier output voltage to the regulator and generating a regulatedvoltage based on the collector-emitter voltage of the BJT. Thensupplying the regulated voltage output of the regulator to the gatedriver and optimizing the base current of the BJT based on the regulatedvoltage output of the regulator and the collector-emitter voltage of theBJT.

It is a first objective of the present invention to provide an advancedgate driver circuit for silicon carbide (SiC) bipolar junctiontransistors (BJTs) that provides a proportional base current withminimal power consumption.

A second objective of the present invention is to provide a gate driverthat adjusts the base current to the instantaneous collector current byestimating the collector current by means of the collector-emittervoltage.

A third objective of the present invention is to provide a gate driverthat monitors the effect of temperature on the DC current gain.

A fourth objective of the present invention is to provide a gate driverthat provides a continuous supply of base current to maintain the BJT inthe ON state.

Another objective of the present invention is to provide a gate driverwith minimum power losses during ON state and switching that increasesthe efficiency of the driver.

Yet another objective of the present invention is to provide a driverthat eliminates the need for the high bandwidth current sensors and thedigital signal processors to process collector current of the BJT.

These and other advantages and features of the present invention aredescribed with specificity so as to make the present inventionunderstandable to one of ordinary skill in the art.

BRIEF DESCRIPTION OF THE DRAWINGS

Elements in the figures have not necessarily been drawn to scale inorder to enhance their clarity and improve understanding of thesevarious elements and embodiments of the invention. Furthermore, elementsthat are known to be common and well understood to those in the industryare not depicted in order to provide a clear view of the variousembodiments of the invention, thus the drawings are generalized in formin the interest of clarity and conciseness.

FIG. 1 illustrates a block diagram of a gate driver circuit of a siliconcarbide bipolar junction transistor (SiC BJT) in accordance with thepreferred embodiment of the present invention;

FIG. 2 illustrates a circuit diagram of the gate driver circuit of theSiC BJT in accordance with the preferred embodiment of the presentinvention;

FIG. 3 illustrates a block diagram of the gate driver circuit of the SiCBJT in accordance with one embodiment of the present invention;

FIG. 4 illustrates a graph illustrating the waveforms generated atdifferent stages of the gate driver circuit of the SiC BJT in accordancewith an exemplary embodiment of the present invention;

FIG. 5 illustrates graphs that show the reduction of the driver powerconsumption with respect to the output power of the converter of thepresent gate driver circuit and different existing gate drivers inaccordance with the exemplary embodiment of the present invention; and

FIG. 6 illustrates a flowchart of a method for optimizing the basecurrent of the SiC BJT utilizing the gate driver circuit in accordancewith the preferred embodiment of the present invention.

DETAILED DESCRIPTION OF THE DRAWINGS

In the following discussion that addresses a number of embodiments andapplications of the present invention, reference is made to theaccompanying drawings that form a part hereof, and in which is shown byway of illustration specific embodiments in which the invention may bepracticed. It is to be understood that other embodiments may be utilizedand changes may be made without departing from the scope of the presentinvention.

Various inventive features are described below that can each be usedindependently of one another or in combination with other features.However, any single inventive feature may not address any of theproblems discussed above or only address one of the problems discussedabove. Further, one or more of the problems discussed above may not befully addressed by any of the features described below.

As used herein, the singular forms “a”, “an” and “the” include pluralreferents unless the context clearly dictates otherwise. “And” as usedherein is interchangeably used with “or” unless expressly statedotherwise. As used herein, the term ‘about” means +/−5% of the recitedparameter. All embodiments of any aspect of the invention can be used incombination, unless the context clearly dictates otherwise.

Unless the context clearly requires otherwise, throughout thedescription and the claims, the words ‘comprise’, ‘comprising’, and thelike are to be construed in an inclusive sense as opposed to anexclusive or exhaustive sense; that is to say, in the sense of“including, but not limited to”. Words using the singular or pluralnumber also include the plural and singular number, respectively.Additionally, the words “herein,” “wherein”, “whereas”, “above,” and“below” and words of similar import, when used in this application,shall refer to this application as a whole and not to any particularportions of the application.

The description of embodiments of the disclosure is not intended to beexhaustive or to limit the disclosure to the precise form disclosed.While the specific embodiments of, and examples for, the disclosure aredescribed herein for illustrative purposes, various equivalentmodifications are possible within the scope of the disclosure, as thoseskilled in the relevant art will recognize.

Referring to FIGS. 1-2, a block diagram and a circuit diagram of a gatedriver circuit 100 of a silicon carbide bipolar junction transistor (SiCBJT) 102 in accordance with the preferred embodiment of the presentinvention are illustrated respectively. SiC BJTs have very low specificon-resistance and offer high temperature operation due to the lack ofgate oxide. This makes them very suitable for power switches and forapplications with high power densities. A continuous supply of basecurrent Is is needed to maintain the SiC BJT in the ON state. The gatedriver circuit 100 of the present embodiment provides the continuousbase current I_(B) based on the collector-emitter voltage V_(CE) of theSiC BJT 102. The present invention provides a proportional base currentdriver circuit 100 that adjusts the base current I_(B) to theinstantaneous collector current I_(C) by estimating thecollector-emitter voltage V_(CE) and at the same time monitoring theeffect of temperature on the DC current gain.

The collector-emitter voltage V_(CE) drop across the BJT 102 during theON state is used to estimate the collector current I_(C), rather thanmeasuring the current directly. Hence, the collector-emitter voltageV_(C)E measurement is used to determine the required base current I_(B)to drive the SiC BJT 102. As the operating temperature of the BJT 102increases, the amount of the base current I_(B) required for the samecollector current increases, because the DC current gain decreases withtemperature. Moreover, the on-resistance of SiC BJTs also increases withtemperature, which for the same collector current I_(C) results in ahigher collector-emitter voltage drop. This increase in the voltage dropcompensates for the decrease of the DC current gain, which offers thepossibility of accomplishing temperature-sensitivity without measuringthe temperature.

The gate driver circuit 100 of the present embodiment comprises a sensor110 connected across a collector terminal 104 and an emitter terminal106 of the BJT 102, an amplifier 122, a regulator 134 and a gate driver144 connected to a base terminal 108 of the BJT 102. The sensor 110 isconfigured to sense and measure a collector-emitter voltage V_(CE)across the collector terminal 104 and the emitter terminal 106 duringthe ON state of the BJT 102. The sensor 110 comprises a first resistor112 and a second resistor 114 connected in series, a high voltage diode116 with an anode 152 connected between the series connected first andsecond resistors 112, 114 and the cathode 154 connected to the collectorterminal 104 of the BJT 102 and a first capacitor 118 connected parallelto the second resistor 114. The sensor 110 can, preferably, be a highvoltage decoupling diode. In one embodiment, the sensor 110 is a Zenerdiode voltage clamp. The sensor 110 provides a sensor output voltageV_(m) based on the measured collector-emitter voltage V_(CE). The sensor110 detects changes in the temperature of the BJT via its on-stateresistance. The amplifier 122 is connected to a sensor output terminal120 and is configured to amplify the sensor output voltage V_(m). Themeasured values of the sensor output V_(m) indicates that with theincrease in the collector current I_(C), the sensor output V_(m) is alsoincreased. Thus, the sensor output voltage Vm is proportional to thecollector-emitter voltage V_(CE) which in turn is proportional to thecollector current I_(C) of the BJT 102 with an additional offset.

The high voltage decoupling diode 116 protects the circuitry comprisingthe amplifier and the regulator, from high voltage during the OFF stateof the BJT 102. The sensor 110 of the present embodiment senses thecollector current I_(C) by measuring the collector-emitter voltageV_(CE) and thus eliminates the need for the high bandwidth currentsensors and the digital signal processors otherwise required to processcollector current I_(C).

In some other embodiments, sensors such as resistive voltage divider,Zener limiting diode and low voltage MOSFET may be used.

The amplifier 122 comprises a non-inverting operational amplifier 124controlled by means of a plurality of resistors 126, a voltage follower128 connected to the output of the non-inverting operational amplifier128 by means of a first diode 130 and a third resistor 132 connectedacross the first diode 130 and the voltage follower 128. The amplifier122 is selected to provide high gain, good noise immunity and with theability to modify gain depending on the requirement of the base currentI_(B) based on collector-emitter voltage V_(CE). The amplifier 122amplifies the sensor output voltage V_(m) to provide an amplifier outputvoltage V_(ref). The regulator 134 is connected to an amplifier outputterminal 140. The regulator 134 is configured to regulate a regulatoroutput voltage V_(cc) based on the amplifier output voltage V_(ref). Theregulator 134, for example, is a non-isolated synchronous buckconverter. The amplifier output voltage V_(ref) is used as a voltagereference for the regulator 134. The gate driver 144 is connected to aregulator output terminal 142 and is configured to connect/disconnectthe regulator output voltage V_(cc) to the base terminal of the BJT.With the regulator output voltage V_(cc), the gate signals are generatedinternally in accordance with the amplifier output voltage V_(ref). Theregulator 134 regulates the voltage of the gate driver 144 to generatethe instantaneous proportional base current I_(B) based on thecollector-emitter voltage V_(CE) during the conducting state of the BJT102 and thereby minimizing the driver losses.

The power losses during the conduction state of the BJT 102 aredetermined by the collector current I_(C) and the On-resistance. Thepower losses generated in the gate driver 144 can be calculated withbase current I_(B), the base-emitter saturation voltage (V_(BE(sat))),the internal base resistance (R_(Bint)), the external base resistance(R_(Bext)) and the driver resistance (R_(driver)).

A Pulse width modulated (PWM) signal 146 is used for controlling thegate driver 144 output. The regulator 134 provides voltage supply to thegate driver 144 to provide the continuous supply of base current I_(B)to maintain the BJT 102 in ON state with minimal conduction losses. Theregulator 134, for example, can be an integrated circuit (IC) with asynchronous buck converter inside (LTC3600). Thus, the gate drivercircuit 100 of the present invention optimizes the base current I_(B)based on the collector-emitter voltage V_(CE) by adjusting the voltageapplied to the gate driver 144 by the regulator 134. The output voltageof the regulator 134 is controlled by an inductor 136 and a capacitor138 connected to the regulator output terminal 142. The gate driver 144output voltage is adjusted during the conducting state of the BJT 102.Thus, the operation of the present invention includes the flow ofcollector current I_(C) through the BJT that results in a voltage dropacross the collector-emitter terminals V_(CE), which is measured by thesensor 110. The output of the sensor V_(m) is conditioned with theamplifier 122 that generates the amplifier output V_(ref) for theregulator 134. The regulator 134 buffers the amplifier output V_(ref) tooutput the voltage V_(cc) that causes the gate driver 144 to generatethe required base current I_(B) to flow through the BJT 102 to keep itin ON state. Output voltage of the regulator 134 is dependent on thetemperature of the SiC BJT 102. The gate driver 144 optimizes the basecurrent by monitoring the effect of temperature on the DC current gainof the BJT.

FIG. 3 illustrates a block diagram of the gate driver circuit 100 of theSiC BJT 102 employing an isolated regulator 150. In this embodiment ofthe present invention, an isolated regulator topology is utilized. Thecollector-emitter voltage V_(CE) of the BJT 102 is measured by thesensor 110 and provided to the amplifier 122 which amplifies the sensoroutput voltage as illustrated in FIG. 1. In this embodiment, theamplified amplifier output voltage is then applied to the isolatedregulator 150. The isolated regulator 150 of this embodiment is based onFlyback, Push-Pull, Half/full-Bridge, etc. The isolated regulator 150 iscombined with an opto-coupler 148, digital isolator or pulsetransformer, for the PWM 146 signal. This embodiment illustrates thegate driver circuit with the isolated regulator for a universal high/lowside driver.

FIG. 4 illustrates a graph illustrating the waveforms generated atdifferent stages of the gate driver circuit 100 of the SiC BJT 102 inaccordance with an exemplary embodiment of the present invention. Thegraphs summarize experimental results of the gate driver circuit 100 ofthe present embodiment used to control the SiC BJT 102. In the exampleillustrated in FIG. 4, a Boost converter at room temperature for anoutput power of 1.6 kW is utilized. The pulse width modulated (PWM)control signal 146 for the SiC BJT 102 is shown as waveform P. Thewaveform of the regulator output voltage V_(cc) and the regulator outputcurrent I_(L) through the inductor 136 is illustrated by Q and Rrespectively. The continuous base current I_(B) proportional to theregulator output voltage V_(cc) is shown by the waveform S.

FIG. 5 illustrates graphs depicting the driver power consumption withrespect to the output power of the converter of the present gate drivercircuit 100 and an existing gate driver in accordance with the exemplaryembodiment of the present invention. A Boost converter was utilized forthis purpose. Experiments were carried out on the existing gate driverand the gate driver circuit 100 of the present invention at roomtemperature. Graphs were calibrated at different output power of theBoost converter. Graphs A, B and C show the variation of the driverpower consumption with respect to the output power of the Boostconverter of the existing gate driver for different values of externalbase resistance. Graph D shows the variation of the driver powerconsumption with respect to the output power of the Boost converter ofthe gate driver circuit 100 of the present embodiment. The graphs revealthat the gate driver circuit 100 of the present embodiment reduced thedriver power consumption by a factor of 4 compared to the existing gatedriver.

The reduction of the driver power consumption offered by embodiments ofthis invention is more noticeable in converters where the inductorcurrent ripple is large (e.g., converters operated in DiscontinuousConduction Mode or Resonant Converters) and converters in applicationswhere the operating temperature of the SiC BJT is expected to fluctuatewithin a large temperature window.

Thus, the present invention 100 provides the proportional base currentIs based on the collector-emitter voltage V_(CE) and eliminates highbandwidth current sensors and micro-controllers. Embodiments of thisinvention also provide a standalone gate driver circuit that replacesother switch and driver combinations using IGBTs or MOSFETs, without anymodifications at the converter level.

FIG. 6 illustrates a flowchart of a method for optimizing the basecurrent of the SiC BJT utilizing the gate driver circuit in accordancewith the preferred embodiment of the present invention. The methodcomprises the steps of: providing the gate driver circuit having asensor, an amplifier, a regulator and a gate driver as indicated inblock 202. Sensing and measuring a collector-emitter voltage by thesensor based on a collector current during the conducting state of theBJT as indicated in block 204. As indicated in block 206, providing themeasured sensor voltage to the amplifier of the gate driver circuit andgenerating an amplifier output voltage and providing the amplifieroutput voltage to the regulator and generating a regulated voltage basedon the collector-emitter voltage of the BJT as indicated in block 208.Applying the regulated voltage output of the regulator to the gatedriver as indicated in block 210 and optimizing the base current of theBJT based on the regulated voltage output of the regulator and thecollector-emitter voltage of the BJT as indicated in block 212.

The present invention provides a novel design of the gate driver circuit100 with minimal power consumption, adjusts the base current I_(B) tothe instantaneous collector current I_(C) by adjusting the drivervoltage supply V_(cc), based on the effect of temperature on the DCcurrent gain. The driver circuit 100 of the present embodiment can beimplemented in any power electronics converter topology including DC/DCconverters, inverters etc.

Embodiments of this invention also provide a standalone driver circuitthat can replace other switch plus driver combinations using IGBTs orMOSFETs, without any modifications at the converter level.

The foregoing description of the preferred embodiment of the presentinvention has been presented for the purpose of illustration anddescription. It is not intended to be exhaustive or to limit theinvention to the precise form disclosed. Many modifications andvariations are possible in light of the above teachings. It is intendedthat the scope of the present invention not be limited by this detaileddescription, but by the claims and the equivalents to the claimsappended hereto.

What is claimed is:
 1. A gate driver circuit, comprising: a sensorconnected between a collector terminal and an emitter terminal of abipolar junction transistor (BJT), and configured to sense and measure acollector-emitter voltage V_(CE); a regulator configured to regulate aregulator output voltage based on an amplifier voltage; and a gatedriver connected to the regulator output terminal of the regulator andconfigured to provide an instantaneous base current based on thecollector-emitter voltage of the SiC BJT; whereby the regulatorregulates the voltage of the gate driver to generate the instantaneousproportional base current based on the collector-emitter voltage andmonitor the effect of temperature on the DC current gain during theconducting state of the SiC BJT thereby minimizing the driver losses. 2.The gate driver circuit of claim 17 wherein the gate driver optimizesthe base current based on the collector-emitter voltage by adjusting thesupply voltage of the gate driver thereby minimizing the powerconsumption.
 3. The gate driver circuit of claim 17 wherein the gatedriver output voltage is adjusted during the conducting state of theBJT.
 4. The gate driver circuit of claim 17 wherein the gate driveroptimizes the base current by monitoring the effect of temperature onthe DC current gain.
 5. A gate driver circuit, comprising: a regulatorconnected to an amplifier having an amplifier output voltage andconfigured to regulate a regulator output voltage based on the amplifieroutput voltage; and a gate driver connected to a regulator outputterminal of the regulator and configured to connect/disconnect theregulator output voltage to a base terminal of the bipolar junctiontransistor BJT; wherein the output voltage of the regulator iscontrolled by an inductor and a capacitor connected at the regulatoroutput terminal.
 6. The gate driver circuit of claim 6 wherein theamplifier comprises a non-inverting operational amplifier controlled bymeans of a plurality of resistors, a voltage follower connected to anoutput terminal of the non-inverting operational amplifier by means of afirst diode and a third resistor connected across the voltage followerand the first diode configured to provide the output of the amplifier.7. The gate driver circuit of claim 6 wherein the output voltage of theregulator is controlled by an inductor and a capacitor connected at aregulator output terminal.
 8. The gate driver circuit of claim 6 whereina high voltage decoupling diode protects the circuitry comprising theamplifier and the regulator, from high voltage during the OFF state ofthe BJT.
 9. The gate driver circuit of claim 6 wherein the amplifieroutput is used as a voltage reference to the regulator.
 10. The gatedriver circuit of claim 6 further comprising a sensor connected betweena collector terminal and an emitter terminal of a bipolar junctiontransistor (BJT), the sensor configured to sense and measure acollector-emitter voltage V_(CE)
 11. The gate driver circuit of claim 10wherein the sensor comprises a first resistor and a second resistorconnected in series, a high voltage diode with an anode connectedbetween the series connected first and second resistors and the cathodeconnected to the collector terminal of the BJT and a first capacitorconnected parallel to the second resistor.
 12. The gate driver circuitof claim 10 wherein the sensor is a high voltage decoupling diode. 13.The gate driver circuit of claim 10 wherein the sensor is a Zener diodevoltage clamp.
 14. The gate driver circuit of claim 10 wherein thesensor is configured to measure the collector-emitter voltage V_(CE)during the ON state of the BJT.
 15. The gate driver circuit of claim 10wherein the sensor output voltage is proportional to the collectorcurrent of the BJT with an additional offset.
 16. The gate drivercircuit of claim 6 wherein the regulator is a synchronous buckconverter.
 17. The gate driver circuit of claim 6 wherein the regulatorprovides voltage to the gate driver to provide a continuous supply ofbase current to maintain the BJT in ON state with minimal conductionlosses.
 18. The gate driver circuit of claim 17 wherein the gate driveroptimizes the base current based on the collector-emitter voltage byadjusting the supply voltage of the gate driver thereby minimizing thepower consumption.
 19. The gate driver circuit of claim 17 wherein thegate driver output voltage is adjusted during the conducting state ofthe BJT.
 20. The gate driver circuit of claim 17 wherein the gate driveroptimizes the base current by monitoring the effect of temperature onthe DC current gain.